Sciweavers

89 search results - page 18 / 18
» An Implementation of Statistical Default Logic
Sort
View
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
13 years 10 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
PADS
1999
ACM
13 years 9 months ago
Shock Resistant Time Warp
In an attempt to cope with time-varying workload, traditional adaptive Time Warp protocols are designed to react in response to performance changes by altering control parameter c...
Alois Ferscha, James Johnson
WSC
1998
13 years 6 months ago
Using Simulation to Optimize a Horizontal Carousel Storage System
Carousel storage systems are often used to increase storage density, throughput and efficiency while reducing inventory and man-hours. The Hewlett-Packard company has developed a ...
Todd LeBaron, Michael L. Hoffman
IEEEPACT
2009
IEEE
13 years 3 months ago
Adaptive Locks: Combining Transactions and Locks for Efficient Concurrency
Transactional memory is being advanced as an alternative to traditional lock-based synchronization for concurrent programming. Transactional memory simplifies the programming mode...
Takayuki Usui, Reimer Behrends, Jacob Evans, Yanni...