Sciweavers

1079 search results - page 3 / 216
» An Implementation of an Address Generator Using Hash Memorie...
Sort
View
COMPSYSTECH
2010
13 years 6 months ago
An approach for node identification and key management in sensor grids
Security of sensor grids is important especially for surveillance, military and medical applications. The paper addresses methods for two security features. First, an approach for ...
Iliya Georgiev
TCAD
1998
154views more  TCAD 1998»
13 years 5 months ago
Address generation for memories containing multiple arrays
This paper presents techniques for generating addresses for memories containing multiple arrays. Because these techniques rely on the inversion or rearrangement of address bits, t...
Herman Schmit, Donald E. Thomas
ISSS
1996
IEEE
134views Hardware» more  ISSS 1996»
13 years 10 months ago
ADOPT: Efficient Hardware Address Generation in Distributed Memory Architectures
An address generation and optimization environment (ADOPT) for distributed memory architectures, is presented. ADOPT is oriented to minimize the area overhead introduced by the us...
Miguel Miranda, Francky Catthoor, Martin Janssen, ...
IPPS
2010
IEEE
13 years 4 months ago
A PRAM-NUMA model of computation for addressing low-TLP workloads
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...
Martti Forsell
ARC
2006
Springer
131views Hardware» more  ARC 2006»
13 years 10 months ago
Implementation of LPM Address Generators on FPGAs
Abstract. We propose the multiple LUT cascade as a means to configure an ninput LPM (Longest Prefix Match) address generator commonly used in routers to determine the output port g...
Hui Qin, Tsutomu Sasao, Jon T. Butler