30 search results - page 1 / 6 » An Integrated Partitioning and Scheduling Based Branch Decou... |
APCSAC
2005
IEEE
13 years 10 months ago
2005
IEEE
Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate th...
CASES
2006
ACM
13 years 11 months ago
2006
ACM
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
INTEGRATION
2007
13 years 5 months ago
2007
In this paper, we propose an efficient algorithm to reduce the voltage noises for on-chip power/ground (P/G) networks of VLSI. The new method is based on the sequence of linear p...
IPPS
2009
IEEE
13 years 11 months ago
2009
IEEE
DTA (Decoupled Threaded Architecture) is designed to exploit fine/medium grained Thread Level Parallelism (TLP) by using a distributed hardware scheduling unit and relying on exi...
ATMOS
2007
13 years 6 months ago
2007
We discuss timetables in ex-urban bus traffic that consist of many trips serviced every day together with some exceptions that do not repeat daily. Traditional optimization methods...