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PPOPP
2009
ACM
14 years 6 months ago
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
Muthu Manikandan Baskaran, Nagavijayalakshmi Vydya...
FPL
2001
Springer
123views Hardware» more  FPL 2001»
13 years 10 months ago
Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines
This paper presents new achievements on the automatic mapping of algorithms, written in imperative software programming languages, to custom computing machines. The reconfigurable ...
João M. P. Cardoso, Horácio C. Neto
ICS
1998
Tsinghua U.
13 years 10 months ago
High-level Management of Communication Schedules in HPF-like Languages
The goal of High Performance Fortran (HPF) is to "address the problems of writing data parallel programs where the distribution of data affects performance", providing t...
Siegfried Benkner, Piyush Mehrotra, John Van Rosen...
TVLSI
2008
115views more  TVLSI 2008»
13 years 5 months ago
Outer Loop Pipelining for Application Specific Datapaths in FPGAs
Most hardware compilers apply loop pipelining to increase the parallelism achieved, but pipelining is restricted to the only innermost level in a nested loop. In this work we exten...
Kieron Turkington, Turkington A. Constantinides, K...
PACT
1997
Springer
13 years 10 months ago
Estimating the Parallel Start-Up Overhead for Parallelizing Compilers
A technique for estimating the cost of executing a loop nest in parallel (parallel start-up overhead) is described in this paper. This technique is of utmost importance for paralle...
Rizos Sakellariou