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IESS
2009
Springer
182views Hardware» more  IESS 2009»
13 years 3 months ago
Modeling Cache Effects at the Transaction Level
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
Ardavan Pedram, David Craven, Andreas Gerstlauer
EMSOFT
2004
Springer
13 years 10 months ago
Model based estimation and verification of mobile device performance
Performance is an important quality attribute that needs to be and managed proactively. Abstract models of the system are not very useful if they do not produce reasonably accurat...
Gopalakrishna Raghavan, Ari Salomaki, Raimondas Le...
PLDI
2009
ACM
14 years 4 days ago
Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
Mojtaba Mehrara, Jeff Hao, Po-Chun Hsu, Scott A. M...
ICCD
2005
IEEE
176views Hardware» more  ICCD 2005»
14 years 2 months ago
A Formal Framework for Modeling and Analysis of System-Level Dynamic Power Management
Recent advances in Dynamic Power Management (DPM) techniques have resulted in designs that support a rich set of power management options, both at the hardware and software levels...
Shrirang M. Yardi, Karthik Channakeshava, Michael ...
TCAD
2008
167views more  TCAD 2008»
13 years 5 months ago
System-Level Dynamic Thermal Management for High-Performance Microprocessors
Abstract--Thermal issues are fast becoming major design constraints in high-performance systems. Temperature variations adversely affect system reliability and prompt worst-case de...
Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K....