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» An algorithm for synthesis of system-level interface circuit...
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EURODAC
1995
IEEE
156views VHDL» more  EURODAC 1995»
13 years 8 months ago
KANDIS - a tool for construction of mixed analog/digital systems
The synthesis of electronic circuits on system level o ers the possibility to nd better locations of the A/D interfaces and to determine parameters like clock rates and bit widths...
Peter Oehler, Christoph Grimm, Klaus Waldschmidt
ICCAD
1996
IEEE
119views Hardware» more  ICCAD 1996»
13 years 9 months ago
An algorithm for synthesis of system-level interface circuits
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
Ki-Seok Chung, Rajesh K. Gupta, C. L. Liu
ICCAD
1999
IEEE
125views Hardware» more  ICCAD 1999»
13 years 9 months ago
Direct synthesis of timed asynchronous circuits
This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...
Sung Tae Jung, Chris J. Myers
DAC
1999
ACM
13 years 9 months ago
Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration
This paper presents a novel approach for synthesis of analog systems from behavioral VHDL-AMS specifications. We implemented this approach in the VASE behavioral-synthesis tool. ...
Alex Doboli, Adrián Núñez-Ald...
DAC
2006
ACM
14 years 5 months ago
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Ruten...