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» An analytical state dependent leakage power model for FPGAs
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DATE
2006
IEEE
94views Hardware» more  DATE 2006»
13 years 11 months ago
An analytical state dependent leakage power model for FPGAs
In this paper we present a state dependent analytical leakage power model for FPGAs. The model accounts for subthreshold leakage and gate leakage in FPGAs, since these are the two...
Akhilesh Kumar, Mohab Anis
FPGA
2004
ACM
136views FPGA» more  FPGA 2004»
13 years 10 months ago
Active leakage power optimization for FPGAs
We consider active leakage power dissipation in FPGAs and present a “no cost” approach for active leakage reduction. It is well-known that the leakage power consumed by a digi...
Jason Helge Anderson, Farid N. Najm, Tim Tuan
DAC
2004
ACM
13 years 10 months ago
Parametric yield estimation considering leakage variability
Leakage current has become a stringent constraint in today’s processor designs in addition to traditional constraints on frequency. Since leakage current exhibits a strong inver...
Rajeev R. Rao, Anirudh Devgan, David Blaauw, Denni...
ISLPED
2007
ACM
169views Hardware» more  ISLPED 2007»
13 years 6 months ago
Throughput of multi-core processors under thermal constraints
We analyze the effect of thermal constraints on the performance and power of multi-core processors. We propose system-level power and thermal models, and derive expressions for (a...
Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Ch...
CASES
2007
ACM
13 years 9 months ago
Performance optimal processor throttling under thermal constraints
We derive analytically, the performance optimal throttling curve for a processor under thermal constraints for a given task sequence. We found that keeping the chip temperature co...
Ravishankar Rao, Sarma B. K. Vrudhula