24 search results - page 2 / 5 » An area-optimality study of floorplanning |
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
High level synthesis transformations play a major part in shaping the properties of the final circuit. However, most optimizations are performed without much knowledge of the fina...
ISPD
1999
ACM
13 years 10 months ago
1999
ACM
This paper presents a methodology to analyze signal integrity such as power voltage drop and clock skew in early stages of design, more specifically, when RTL-design and early flo...
ASPDAC
2005
ACM
13 years 7 months ago
2005
ACM
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
ICCAD
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper studies microprocessor floorplanning considering thermal and throughput optimization. We first develop a stochastic heat diffusion model taking into account the appl...
DATE
2002
IEEE
13 years 10 months ago
2002
IEEE
In this paper, we study and implement a routabilitydriven floorplanner with buffer block planning. It evaluates the routability of a floorplan by computing the probability that ...