40 search results - page 3 / 8 » An evolutionary approach to timing driven FPGA placement |
ICCAD
2001
IEEE
14 years 3 months ago
2001
IEEE
Retiming is a widely investigated technique for performance optimization. It performs powerful modifications on a circuit netlist. However, often it is not clear, whether the pred...
ISPD
2007
ACM
13 years 7 months ago
2007
ACM
Traditionally, research in global placement has focused on relatively few simple metrics, such as pure wirelength or routability estimates. However, in the real world today, desig...
JCP
2008
13 years 6 months ago
2008
Rapid increase in transistor density and operating frequency has led to the increase in power densities, exhibiting itself as a high temperature profile. The high temperature spots...
FPL
2004
Springer
13 years 11 months ago
2004
Springer
Abstract. Layout tools for FPGAs can typically be run in two different modes: non-timing-driven and timing-driven. Non-timing-driven mode produces a solution quickly, without consi...
FPL
2004
Springer
13 years 11 months ago
2004
Springer
In order to enable efficient integration of FPGAs into cost effective and reliable high-performance systems as well potentially into low power mobile systems, their power efficienc...