80 search results - page 2 / 16 » An exact algorithm for wirelength optimal placements in VLSI... |
DAC
2000
ACM
14 years 7 months ago
2000
ACM
This work focuses on congestion-driven placement of standard cells into rows in the fixed-die context. We summarize the stateof-the-art after two decades of research in recursive ...
ISPD
2007
ACM
13 years 7 months ago
2007
ACM
In this paper, we derive the X-half-perimeter wirelength (XHPWL) model for X-architecture placement and explore the effects of three different wire models on X-architecture plac...
ASPDAC
2000
ACM
13 years 10 months ago
2000
ACM
Global placement of hypergraphs is critical in the top-down placement of large timing-driven designs 10, 16 . Placement quality is evaluated in terms of the half-perimeter wirelen...
GECCO
2005
Springer
13 years 11 months ago
2005
Springer
Genetic Algorithms have worked fairly well for the VLSI cell placement problem, albeit with significant run times. Two parallel models for GA are presented for VLSI cell placemen...
ISCAS
2005
IEEE
13 years 11 months ago
2005
IEEE
— Simulated Evolution (SimE) is a sound stochastic approximation algorithm based on the principles of adaptation. If properly engineered it is possible for SimE to reach nearopti...