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    ICIP
    2005
    IEEE
    128views Image Processing» more  ICIP 2005»
    System analysis of VLSI architecture for motion-compensated temporal filtering
    14 years 7 months ago
    System analysis of VLSI architecture for motion-compensated temporal filtering
    Download  video.ee.ntu.edu.tw
    The Motion-Compensated Temporal Filtering (MCTF) is an innovative prediction scheme for video coding and has become the core technology of the coming video coding standard, MPEG21...
    Ching-Yeh Chen, Chao-Tsung Huang, Yi-Hua Chen, Chu...
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    VLSISP
    2008
    123views more  VLSISP 2008»
    Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
    13 years 5 months ago
    Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
    Download  trappist.elis.ugent.be
    ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
    Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
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    TCSV
    2008
    225views more  TCSV 2008»
    Analysis and Efficient Architecture Design for VC-1 Overlap Smoothing and In-Loop Deblocking Filter
    13 years 5 months ago
    Analysis and Efficient Architecture Design for VC-1 Overlap Smoothing and In-Loop Deblocking Filter
    Download  videoprocessing.ucsd.edu
    Abstract--In contrast to the macroblock-based in-loop deblocking filters, the filters of VC-1 perform all horizontal edges (for in-loop filtering) or vertical edges (for overlap sm...
    Yen-Lin Lee, T. Q. Nguyen
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    IAJIT
    2008
    201views more  IAJIT 2008»
    Implementation of a Novel Efficient Multiwavelet Based Video Coding Algorithm
    13 years 5 months ago
    Implementation of a Novel Efficient Multiwavelet Based Video Coding Algorithm
    Download  www.ccis2k.org
    : The recent explosion in digital video storage and delivery has presented strong motivation for high performance video compression solutions. An efficient video compression techni...
    Sudhakar Radhakrishnan, Jayaraman Subramaniam
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    VLSISP
    2008
    132views more  VLSISP 2008»
    Serial and Parallel FPGA-based Variable Block Size Motion Estimation Processors
    13 years 5 months ago
    Serial and Parallel FPGA-based Variable Block Size Motion Estimation Processors
    Download  www.cse.cuhk.edu.hk
    H.264/AVC is the latest video coding standard adopting variable block size motion estimation (VBS-ME), quarter-pixel accuracy, motion vector prediction and multi-reference frames f...
    Brian M. H. Li, Philip Heng Wai Leong
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