21 search results - page 3 / 5 » Analog layout synthesis - Recent advances in topological app... |
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
In this paper, a simulation-based synthesis tool, AMIGO, for analog cell sizing is presented. AMIGO is based upon genetic optimization techniques adapted to circuit sizing. A fram...
ISCAS
2005
IEEE
13 years 11 months ago
2005
IEEE
— Accurate analysis of VLSI interconnects is essential to the performance-driven synthesis and layout of integrated circuits. Existing techniques are based on either simulation, ...
DAC
1994
ACM
13 years 9 months ago
1994
ACM
New placement techniques are presented which substantially improve the process of automatic layout generation of analog IC's. Extremely tight specifications can be enforced o...
DAC
2003
ACM
13 years 10 months ago
2003
ACM
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...