4 search results - page 1 / 1 » Analytical macromodeling for high-level power estimation |
DAC
1997
ACM
13 years 9 months ago
1997
ACM
A modeling approach is presented that captures the dependence of the power dissipation of a combinational logic circuit on its input output signal switching activity. The resulting...
ICCAD
1999
IEEE
13 years 9 months ago
1999
IEEE
DAC
1997
ACM
13 years 9 months ago
1997
ACM
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
CODES
2004
IEEE
13 years 8 months ago
2004
IEEE
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...