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» Analyzing Advanced PDE Solvers Through Simulation
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ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
13 years 11 months ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...
EDCC
2006
Springer
13 years 9 months ago
SEU Mitigation Techniques for Microprocessor Control Logic
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
T. S. Ganesh, Viswanathan Subramanian, Arun K. Som...
GLVLSI
2009
IEEE
189views VLSI» more  GLVLSI 2009»
14 years 4 hour ago
High-performance, cost-effective heterogeneous 3D FPGA architectures
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
Roto Le, Sherief Reda, R. Iris Bahar
WECWIS
2007
IEEE
172views ECommerce» more  WECWIS 2007»
13 years 11 months ago
An Analysis Tool for Execution of BPEL Services
Business Process Execution Language (BPEL) is an XML-based language for specifying services. There have been numerous recent research and development efforts in both statically an...
Ariane Gravel, Xiang Fu, Jianwen Su