26 search results - page 3 / 6 » Analyzing Specifications for Delay-Insensitive Circuits |
MR
2002
13 years 5 months ago
2002
Experiments are described in this paper whose results suggest a clear mathematical relationship between total circuit resistance (including the capacitor's ESR) and the volta...
DAC
1994
ACM
13 years 10 months ago
1994
ACM
- This paper analyzes the effect of resource sharing and assignment on the clock period of the synthesized circuit. We focus on behavioral specifications with mutually exclusive pa...
ASPDAC
2007
ACM
13 years 10 months ago
2007
ACM
Abstract-- We present the short-circuit code transformation technique, intended for embedded compilers. The transformation technique optimizes conditional blocks in high-level prog...
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
DAC
2007
ACM
14 years 7 months ago
2007
ACM
In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent ...