68 search results - page 4 / 14 » Application of Parallel Processors to Real-Time Sensor Array... |
IPPS
1998
IEEE
13 years 10 months ago
1998
IEEE
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...
ISCAS
2008
IEEE
14 years 5 days ago
2008
IEEE
— In this paper we present implementation and experimental results for a digital vision chip that operates in mixed asynchronous/synchronous mode. Mixed configuration benefits fr...
VLSISP
2011
13 years 22 days ago
2011
We introduce a novel beamspace processing structure that can be used for narrowband or wideband sources located either in nearfield or farfield of a sensor array. Main features o...
HICSS
2006
IEEE
13 years 12 months ago
2006
IEEE
Hardware designers are increasingly turning to Single Chip Multi-Processors to achieve power and throughput goals. To further increase performance for a specific application the c...
ASAP
2006
IEEE
13 years 12 months ago
2006
IEEE
Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a stat...