62 search results - page 1 / 13 » Applying Logic Synthesis for Speeding Up SAT |
SAT
2007
Springer
13 years 11 months ago
2007
Springer
SAT solvers are often challenged with very hard problems that remain unsolved after hours of CPU time. The research community meets the challenge in two ways: (1) by improving the ...
TCAD
2008
13 years 5 months ago
2008
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
ATS
2009
IEEE
14 years 15 hour ago
2009
IEEE
Abstract—SAT-based ATPG turned out to be a robust alternative to classical structural ATPG algorithms such as FAN. The number of unclassified faults can be significantly reduce...
AIA
2006
13 years 6 months ago
2006
Model-based diagnosis of technical systems requires both a simulation machinery and a logic calculus. The former is responsible for the system's behavior analysis, the latter...
ICCAD
2006
IEEE
14 years 2 months ago
2006
IEEE
The paper explores several ways to improve the speed and capacity of combinational equivalence checking based on Boolean satisfiability (SAT). State-of-the-art methods use simulat...