73 search results - page 3 / 15 » Approximate logic synthesis for error tolerant applications |
ICPP
1987
IEEE
13 years 9 months ago
1987
IEEE
-- A hardware fault tolerance scheme for large multicomputers executing time-consuming non-interactive applications is described. Error detection and recovery are done mostly by so...
SODA
1994
ACM
13 years 7 months ago
1994
ACM
Abstract Yossi Matias Je rey Scott Vitter y Neal E. Young z In this paper we introduce the notion of approximate data structures, in which a small amount of error is tolerated in...
SBCCI
2009
ACM
14 years 8 days ago
2009
ACM
The purpose of this work is the proposal of a 10-Bit / 1 MSPS Analog to Digital Converter (ADC) with error correction to match the requirements of a CMOS wavefront sensor for opht...
DATE
2010
IEEE
13 years 11 months ago
2010
IEEE
There is a growing concern about the increasing vulnerability of future computing systems to errors in the underlying hardware. Traditional redundancy techniques are expensive for...
IOLTS
2008
IEEE
14 years 5 days ago
2008
IEEE
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...