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DATE
2009
IEEE
202views Hardware» more  DATE 2009»
13 years 11 months ago
Design as you see FIT: System-level soft error analysis of sequential circuits
Soft errors in combinational and sequential elements of digital circuits are an increasing concern as a result of technology scaling. Several techniques for gate and latch hardeni...
Daniel Holcomb, Wenchao Li, Sanjit A. Seshia
HASE
2008
IEEE
13 years 5 months ago
Randomization Based Probabilistic Approach to Detect Trojan Circuits
In this paper, we propose a randomization based technique to verify whether a manufactured chip conforms to its design or is infected by any trojan circuit. A trojan circuit can be...
Susmit Jha, Sumit Kumar Jha
ICCD
2006
IEEE
113views Hardware» more  ICCD 2006»
14 years 1 months ago
A theory of Error-Rate Testing
— We have entered an era where chip yields are decreasing with scaling. A new concept called intelligible testing has been previously proposed with the goal of reversing this tre...
Shideh Shahidi, Sandeep Gupta
DATE
2008
IEEE
104views Hardware» more  DATE 2008»
13 years 11 months ago
Multi-Vector Tests: A Path to Perfect Error-Rate Testing
The importance of testing approaches that exploit error tolerance to improve yield has previously been established. Error rate, defined as the percentage of vectors for which the...
Shideh Shahidi, Sandeep Gupta
IOLTS
2006
IEEE
103views Hardware» more  IOLTS 2006»
13 years 10 months ago
Designing Robust Checkers in the Presence of Massive Timing Errors
So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...
Frederic Worm, Patrick Thiran, Paolo Ienne