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CASES
2007
ACM
13 years 9 months ago
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. ...
DATE
2005
IEEE
108views Hardware» more  DATE 2005»
13 years 11 months ago
A Technology-Aware and Energy-Oriented Topology Exploration for On-Chip Networks
As packet-switching interconnection networks replace buses and dedicated wires to become the standard on-chip interconnection fabric, reducing their power consumption has been ide...
Hangsheng Wang, Li-Shiuan Peh, Sharad Malik
DATE
2010
IEEE
202views Hardware» more  DATE 2010»
13 years 11 months ago
FlashPower: A detailed power model for NAND flash memory
Abstract— Flash memory is widely used in consumer electronics products, such as cell-phones and music players, and is increasingly displacing hard disk drives as the primary stor...
Vidyabhushan Mohan, Sudhanva Gurumurthi, Mircea R....
DATE
2004
IEEE
109views Hardware» more  DATE 2004»
13 years 9 months ago
RTL Processor Synthesis for Architecture Exploration and Implementation
Architecture description languages are widely used to perform architecture exploration for application-driven designs, whereas the RT-level is the commonly accepted level for hard...
Oliver Schliebusch, Anupam Chattopadhyay, Rainer L...
TVLSI
2008
139views more  TVLSI 2008»
13 years 5 months ago
Ternary CAM Power and Delay Model: Extensions and Uses
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
Banit Agrawal, Timothy Sherwood