29 search results - page 6 / 6 » Architectural Exploration of the ADRES Coarse-Grained Reconf... |
FCCM
1998
IEEE
13 years 9 months ago
1998
IEEE
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting n...
DAC
2004
ACM
13 years 10 months ago
2004
ACM
Silicon compilers are often used in conjunction with Field Programmable Gate Arrays (FPGAs) to deliver flexibility, fast prototyping, and accelerated time-to-market. Many of these...
FCCM
2003
IEEE
13 years 10 months ago
2003
IEEE
FPGAs have appealing features such as customizable internal and external bandwidth and the ability to exploit vast amounts of fine-grain parallelism. In this paper we explore the ...
FPGA
2006
ACM
13 years 8 months ago
2006
ACM
In this paper, we present reconfigurable hardware architecture for detecting semantics of streaming data on 1+ Gbps networks. The design leverages on the characteristics of contex...