Sciweavers

312 search results - page 1 / 63
» Architectural approaches to reduce leakage energy in caches
Sort
View
ISCAS
2002
IEEE
154views Hardware» more  ISCAS 2002»
13 years 9 months ago
Architectural approaches to reduce leakage energy in caches
In this paper, we present two methods to reduce leakage energy by dynamically resizing the cache during program execution. The first method monitors the miss rate of the individua...
S. H. Tadas, C. Chakrabarti
ICCAD
2003
IEEE
131views Hardware» more  ICCAD 2003»
14 years 1 months ago
LRU-SEQ: A Novel Replacement Policy for Transition Energy Reduction in Instruction Caches
Leakage energy will be the major energy consumer in future deep sub-micron designs. Especially the memory sub-system of future SOCs will be negatively affected by this trend. In o...
Praveen Kalla, Xiaobo Sharon Hu, Jörg Henkel
ISCA
2002
IEEE
112views Hardware» more  ISCA 2002»
13 years 9 months ago
Drowsy Caches: Simple Techniques for Reducing Leakage Power
On-chip caches represent a sizable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potential...
Krisztián Flautner, Nam Sung Kim, Steven M....
CASES
2007
ACM
13 years 8 months ago
Cache leakage control mechanism for hard real-time systems
Leakage energy consumption is an increasingly important issue as the technology continues to shrink. Since on-chip caches constitute a major portion of the processor's transi...
Jaw-Wei Chi, Chia-Lin Yang, Yi-Jung Chen, Jian-Jia...
CODES
2003
IEEE
13 years 10 months ago
Tracking object life cycle for leakage energy optimization
The focus of this work is on utilizing the state of objects during their lifespan in optimizing the leakage energy consumed in the data caches when executing embedded Java applica...
Guangyu Chen, Narayanan Vijaykrishnan, Mahmut T. K...