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» Architectural support for operating system-driven CMP cache ...
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MICRO
2008
IEEE
139views Hardware» more  MICRO 2008»
13 years 11 months ago
Adaptive data compression for high-performance low-power on-chip networks
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
Yuho Jin, Ki Hwan Yum, Eun Jung Kim
IWMM
2009
Springer
114views Hardware» more  IWMM 2009»
13 years 11 months ago
Scalable support for multithreaded applications on dynamic binary instrumentation systems
Dynamic binary instrumentation systems are used to inject or modify arbitrary instructions in existing binary applications; several such systems have been developed over the past ...
Kim M. Hazelwood, Greg Lueck, Robert Cohn
EDBT
2010
ACM
151views Database» more  EDBT 2010»
13 years 10 months ago
Warm cache costing: a feedback optimization technique for buffer pool aware costing
Most modern RDBMS depend on the query processing optimizer’s cost model to choose the best execution plan for a given query. Since the physical IO (PIO) is a costly operation to...
H. S. Ramanujam, Edwin Seputis
SIGCOMM
2009
ACM
13 years 11 months ago
SmartRE: an architecture for coordinated network-wide redundancy elimination
Application-independent Redundancy Elimination (RE), or identifying and removing repeated content from network transfers, has been used with great success for improving network pe...
Ashok Anand, Vyas Sekar, Aditya Akella
HPDC
2010
IEEE
13 years 6 months ago
Efficient querying of distributed provenance stores
Current projects that automate the collection of provenance information use a centralized architecture for managing the resulting metadata - that is, provenance is gathered at rem...
Ashish Gehani, Minyoung Kim, Tanu Malik