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» Area estimation and optimisation of FPGA routing fabrics
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FPL
2009
Springer
145views Hardware» more  FPL 2009»
13 years 9 months ago
Area estimation and optimisation of FPGA routing fabrics
This paper presents a methodology for estimating and optimising FPGA routing fabrics using high-level modelling and convex optimisation techniques. Experimental methods for explor...
Alastair M. Smith, George A. Constantinides, Peter...
FPGA
2007
ACM
84views FPGA» more  FPGA 2007»
13 years 11 months ago
A routing fabric for monolithically stacked 3D-FPGA
A previous study on the benefits of monolithically stacked 3D-FPGA has estimated a 3.2x improvement in logic den
Mingjie Lin, Abbas El Gamal
FPGA
2007
ACM
106views FPGA» more  FPGA 2007»
13 years 11 months ago
A synthesizable datapath-oriented embedded FPGA fabric
We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai ...
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
13 years 10 months ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose
FCCM
1998
IEEE
170views VLSI» more  FCCM 1998»
13 years 9 months ago
Characterization and Parameterization of a Pipeline Reconfigurable FPGA
ended abstract defines a class of architectures for pipeline reconfigurable FPGAs by parameterizing a generic model. This class of architectures is sufficiently general to allow e...
Matthew Moe, Herman Schmit, Seth Copen Goldstein