12 search results - page 1 / 3 » Area fill synthesis for uniform layout density |
TCAD
2002
13 years 4 months ago
2002
Chemical-mechanical polishing (CMP) and other manufacturing steps in very deep submicron VLSI have varying effects on device and interconnect features, depending on local character...
DAC
2003
ACM
14 years 5 months ago
2003
ACM
Chemical-mechanical planarization (CMP) and other manufacturing steps in very deep-submicron VLSI have varying effects on device and interconnect features, depending on the local ...
DAC
2000
ACM
14 years 5 months ago
2000
ACM
We propose practical iterated methods for layout density control for CMP uniformity, based on linear programming, Monte-Carlo and greedy algorithms. We experimentally study the tr...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
Control of variability and performance in the back end of the VLSI manufacturing line has become extremely difficult with the introduction of new materials such as copper and low...
ISPD
1998
ACM
13 years 8 months ago
1998
ACM
In very deep-submicron VLSI, certain manufacturing steps – notably optical exposure, resist development and etch, chemical vapor deposition and chemical-mechanical polishing (CM...