Sciweavers

260 search results - page 2 / 52
» Array SSA Form and Its Use in Parallelization
Sort
View
ERSA
2004
134views Hardware» more  ERSA 2004»
13 years 6 months ago
A High Performance Application Representation for Reconfigurable Systems
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
Wenrui Gong, Gang Wang, Ryan Kastner
JIPS
2007
100views more  JIPS 2007»
13 years 5 months ago
Static Type Assignment for SSA Form in CTOC
: Although the Java bytecode has numerous advantages, it also has certain shortcomings such as its slow execution speed and difficulty of analysis. In order to overcome such disadv...
Ki-Tae Kim, Weon-Hee Yoo
IEEEPACT
2006
IEEE
13 years 11 months ago
Region array SSA
Static Single Assignment (SSA) has become the intermediate program representation of choice in most modern compilers because it enables efficient data flow analysis of scalars an...
Silvius Rus, Guobin He, Christophe Alias, Lawrence...
MICRO
2012
IEEE
285views Hardware» more  MICRO 2012»
11 years 7 months ago
Automatic Extraction of Coarse-Grained Data-Flow Threads from Imperative Programs
This article presents a general algorithm for transforming sequential imperative programs into parallel data-flow programs. Our algorithm operates on a program dependence graph i...
Feng Li, Antoniu Pop, Albert Cohen
ICS
2001
Tsinghua U.
13 years 9 months ago
Global optimization techniques for automatic parallelization of hybrid applications
This paper presents a novel technique to perform global optimization of communication and preprocessing calls in the presence of array accesses with arbitrary subscripts. Our sche...
Dhruva R. Chakrabarti, Prithviraj Banerjee