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» Asynchronous Architectures for Nanometer Scales
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DAC
2006
ACM
14 years 6 months ago
Are carbon nanotubes the future of VLSI interconnections?
Increasing resistivity of copper with scaling and rising demands on current density requirements are driving the need to identify new wiring solutions for deep nanometer scale VLS...
Kaustav Banerjee, Navin Srivastava
DAC
2006
ACM
13 years 11 months ago
Tomorrow's analog: just dead or just different?
This panel discusses the following topics. With the ongoing trend towards more and more digitization in applications ranging from multimedia to telecommunications, there is a big ...
Shekhar Y. Borkar, Robert W. Brodersen, Jue-Hsien ...
DAC
2011
ACM
12 years 5 months ago
DRAIN: distributed recovery architecture for inaccessible nodes in multi-core chips
As transistor dimensions continue to scale deep into the nanometer regime, silicon reliability is becoming a chief concern. At the same time, transistor counts are scaling up, ena...
Andrew DeOrio, Konstantinos Aisopos, Valeria Berta...
VLSID
2007
IEEE
131views VLSI» more  VLSID 2007»
14 years 21 hour ago
A Placement Methodology for Robust Clocking
As the VLSI technology scales towards the nanometer regime, circuit performance is increasingly affected by variations. These variations need to be considered at an early stage in...
Ganesh Venkataraman, Jiang Hu
AINA
2003
IEEE
13 years 11 months ago
Server Scheduling Scheme for Asynchronous Cluster Video Server
In this paper, we propose an asynchronous cluster video server architecture, which is quite different from synchronous video server architecture in various aspects such as stripin...
Jianhua Sun, Hai Jin, Hao Chen, Zongfen Han