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» Automated Design of Quantum Circuits
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CASES
2009
ACM
13 years 11 months ago
An accelerator-based wireless sensor network processor in 130nm CMOS
Networks of ultra-low-power nodes capable of sensing, computation, and wireless communication have applications in medicine, science, industrial automation, and security. Over the...
Mark Hempstead, Gu-Yeon Wei, David Brooks
DAC
2006
ACM
14 years 6 months ago
Timing-based delay test for screening small delay defects
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
ISCAS
2006
IEEE
122views Hardware» more  ISCAS 2006»
13 years 11 months ago
256-channel integrated neural interface and spatio-temporal signal processor
Abstract- We present an architecture and VLSI implemen- Various strategies in the analysis of spatio-temporal dynamtation of a distributed neural interface and spatio-temporal ics ...
J. N. Y. Aziz, Roman Genov, B. R. Bardakjian, M. D...
CODES
2005
IEEE
13 years 11 months ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...
CP
2008
Springer
13 years 6 months ago
Search Strategies for Rectangle Packing
Rectangle (square) packing problems involve packing all squares with sizes 1 × 1 to n × n into the minimum area enclosing rectangle (respectively, square). Rectangle packing is a...
Helmut Simonis, Barry O'Sullivan