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» Automated Logic Synthesis of Random-Pattern-Testable Circuit...
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DATE
2005
IEEE
143views Hardware» more  DATE 2005»
13 years 11 months ago
Energy Bounds for Fault-Tolerant Nanoscale Designs
- The problem of determining lower bounds for the energy cost of a given nanoscale design is addressed via a complexity theory-based approach. This paper provides a theoretical fra...
Diana Marculescu
DAC
2007
ACM
14 years 6 months ago
Global Critical Path: A Tool for System-Level Timing Analysis
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea...
ICCAD
2007
IEEE
102views Hardware» more  ICCAD 2007»
14 years 2 months ago
Scalable exploration of functional dependency by interpolation and incremental SAT solving
Functional dependency is concerned with rewriting a Boolean function f as a function h over a set of base functions {g1, …, gn}, i.e. f = h(g1, …, gn). It plays an important r...
Chih-Chun Lee, Jie-Hong Roland Jiang, Chung-Yang H...
DAC
2003
ACM
14 years 6 months ago
Clock-tree power optimization based on RTL clock-gating
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
Monica Donno, Alessandro Ivaldi, Luca Benini, Enri...
GECCO
2008
Springer
201views Optimization» more  GECCO 2008»
13 years 6 months ago
Advanced techniques for the creation and propagation of modules in cartesian genetic programming
The choice of an appropriate hardware representation model is key to successful evolution of digital circuits. One of the most popular models is cartesian genetic programming, whi...
Paul Kaufmann, Marco Platzner