101 search results - page 3 / 21 » Automatic Clock Abstraction from Sequential Circuits |
DAC
2003
ACM
14 years 6 months ago
2003
ACM
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
FORTE
1998
13 years 6 months ago
1998
: In this paper, we propose a technique for hardware implementation of protocol specifications in LOTOS. For the purpose, we define a new model called synchronous EFSMs consisting ...
TVLSI
2008
13 years 5 months ago
2008
Abstract--The quantum-dot cellular automata (QCA) model offers a novel nano-domain computing architecture by mapping the intended logic onto the lowest energy configuration of a co...
CAL
2006
13 years 5 months ago
2006
Chip multiprocessors are of increasing importance due to recent difficulties in achieving higher clock frequencies in uniprocessors, but their success depends on finding useful wor...
ENTCS
2006
13 years 5 months ago
2006
A compiler that automatically translates recursive function definitions in higher order logic to clocked synchronous hardware is described. Compilation is by mechanised proof in t...