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DDECS
2006
IEEE
146views Hardware» more  DDECS 2006»
13 years 8 months ago
Automatic Identification of Timing Anomalies for Cycle-Accurate Worst-Case Execution Time Analysis
Abstract-- Hard real-time systems need methods to determine upper bounds for their execution times, usually called worst-case execution times. Timing anomalies are counterintuitive...
Jochen Eisinger, Ilia Polian, Bernd Becker, Alexan...
ECRTS
2009
IEEE
13 years 2 months ago
Precise Worst-Case Execution Time Analysis for Processors with Timing Anomalies
This paper explores timing anomalies in WCET analysis. Timing anomalies add to the complexity of WCET analysis and make it hard to apply divide-and-conquer strategies to simplify ...
Raimund Kirner, Albrecht Kadlec, Peter P. Puschner
CASES
2006
ACM
13 years 8 months ago
An accurate and efficient simulation-based analysis for worst case interruption delay
This paper proposes an efficient method to analyze worst case interruption delay (WCID) of a workload running on modern microprocessors using a cycle accurate simulator (CAS). Our...
Hiroshi Nakashima, Masahiro Konishi, Takashi Nakad...
WCET
2003
13 years 6 months ago
Fully Automatic, Parametric Worst-Case Execution Time Analysis
Worst-Case Execution Time (WCET) analysis means to compute a safe upper bound to the execution time of a piece of code. Parametric WCET analysis yields symbolic upper bounds: expr...
Björn Lisper
WCET
2007
13 years 6 months ago
Automatic Amortised Worst-Case Execution Time Analysis
Our research focuses on formally bounded WCET analysis, where we aim to provide absolute guarantees on execution time bounds. In this paper, we describe how amortisation can be us...
Christoph A. Herrmann, Armelle Bonenfant, Kevin Ha...