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» Automatic creation of tile size selection models
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IEEEPACT
2009
IEEE
13 years 12 months ago
Automatic Tuning of Discrete Fourier Transforms Driven by Analytical Modeling
—Analytical models have been used to estimate optimal values for parameters such as tile sizes in the context of loop nests. However, important algorithms such as fast Fourier tr...
Basilio B. Fraguela, Yevgen Voronenko, Markus P&uu...
IMSCCS
2006
IEEE
13 years 11 months ago
CoarseZ Buffer Bandwidth Model in 3D Rendering Pipeline
Depth traffic occupies a major portion of 3D graphics memory bandwidth. In order to reduce depth reading, we propose employing a low-resolution depth buffer, namely CoarseZ buffer...
Ke Yang, Ke Gao, Jiaoying Shi, Xiaohong Jiang, Hua...
MM
2006
ACM
145views Multimedia» more  MM 2006»
13 years 11 months ago
Interactive mosaic generation for video navigation
Navigation through large multimedia collections that include videos and images still remains a hard problem. In this paper, we introduce a novel method to visualize and navigate t...
Kihwan Kim, Irfan A. Essa, Gregory D. Abowd
COLING
2000
13 years 6 months ago
Word Sense Disambiguation of Adjectives Using Probabilistic Networks
In this paper, word sense dismnbiguation (WSD) accuracy achievable by a probabilistic classifier, using very milfimal training sets, is investigated. \Ve made the assuml)tiou that...
Gerald Chao, Michael G. Dyer
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
13 years 10 months ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose