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VLSID
2002
IEEE
189views VLSI» more  VLSID 2002»
14 years 5 months ago
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, ...
VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
14 years 5 months ago
Model Based Test Generation for Microprocessor Architecture Validation
Functional validation of microprocessors is growing in complexity in current and future microprocessors. Traditionally, the different components (or validation collaterals) used i...
Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Di...
DATE
2005
IEEE
119views Hardware» more  DATE 2005»
13 years 10 months ago
Functional Validation of System Level Static Scheduling
Increase in system level modeling has given rise to a need for efficient functional validation of models above cycle accurate level. This paper presents a technique for comparing...
Samar Abdi, Daniel D. Gajski
COMPSAC
2007
IEEE
13 years 11 months ago
An Automatic Connector Generation Method for Dynamic Architecture
In a component-based system components are basic computation units implementing specific business functions, and their interactions are explicitly represented by connectors. If th...
Yiming Yang, Xin Peng, Wenyun Zhao
DSD
2004
IEEE
129views Hardware» more  DSD 2004»
13 years 8 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt