Sciweavers

Share
70 search results - page 1 / 14
» Automating Optimized Table-with-Polynomial Function Evaluati...
Sort
View
FPL
2004
Springer
103views Hardware» more  FPL 2004»
9 years 3 months ago
Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs
Abstract. Function evaluation is at the core of many compute-intensive applications which perform well on reconfigurable platforms. Yet, in order to implement function evaluation ...
Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne L...
CASES
2005
ACM
9 years 3 days ago
Automating custom-precision function evaluation for embedded processors
Due to resource and power constraints, embedded processors often cannot afford dedicated floating-point units. For instance, the IBM PowerPC processor embedded in Xilinx Virtex-...
Ray C. C. Cheung, Dong-U Lee, Oskar Mencer, Wayne ...
FCCM
2002
IEEE
174views VLSI» more  FCCM 2002»
9 years 3 months ago
PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs
This paper explores the implications of integrating flexible module generation into a compiler for FPGAs. The objective is to improve the programmabilityof FPGAs, or in other wor...
Oskar Mencer
FCCM
2007
IEEE
107views VLSI» more  FCCM 2007»
9 years 4 months ago
Optimizing Logarithmic Arithmetic on FPGAs
This paper proposes optimizations of the methods and parameters used in both mathematical approximation and hardware design for logarithmic number system (LNS) arithmetic. First, ...
Haohuan Fu, Oskar Mencer, Wayne Luk
DAC
2002
ACM
9 years 11 months ago
IP delivery for FPGAs using Applets and JHDL
This paper introduces an FPGA IP evaluation and delivery system that operates within Java applets. The use of such applets allows designers to create, evaluate, test, and obtain F...
Michael J. Wirthlin, Brian McMurtrey
books