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» Balancing Logic Utilization and Area Efficiency in FPGAs
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CVPR
2008
IEEE
13 years 7 months ago
Real-time global localization with a pre-built visual landmark database
In this paper, we study how to build a vision-based system for global localization with accuracies within 10cm. for robots and humans operating both indoors and outdoors over wide...
Zhiwei Zhu, Taragay Oskiper, Supun Samarasekera, R...
HPDC
2007
IEEE
14 years 3 days ago
IDEA: : an infrastructure for detection-based adaptive consistency control in replicated services
In Internet-scale distributed systems, replicationbased scheme has been widely deployed to increase the availability and efficiency of services. Hence, consistency maintenance amo...
Yijun Lu, Ying Lu, Hong Jiang
CSREAEEE
2006
145views Business» more  CSREAEEE 2006»
13 years 7 months ago
e-Business Systems: Exploring Knowledge Prospect Domains (KPDs)
Research was conducted in the area of sustainable knowledge extraction from e-business systems and technologies. Differentiating approaches from three notable authors in the field...
Daniel Botha
ICCD
2007
IEEE
225views Hardware» more  ICCD 2007»
14 years 2 months ago
Fine grain 3D integration for microarchitecture design through cube packing exploration
Most previous 3D IC research focused on “stacking” traditional 2D silicon layers, so the interconnect reduction is limited to interblock delays. In this paper, we propose tech...
Yongxiang Liu, Yuchun Ma, Eren Kursun, Glenn Reinm...
FPGA
2000
ACM
122views FPGA» more  FPGA 2000»
13 years 9 months ago
A reconfigurable multi-function computing cache architecture
A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not actively need all the cache storage, especially...
Huesung Kim, Arun K. Somani, Akhilesh Tyagi