47 search results - page 1 / 10 » Bandwidth-Constrained Mapping of Cores onto NoC Architecture... |
DATE
2004
IEEE
13 years 9 months ago
2004
IEEE
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the e...
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
In this paper, we investigate the core-switch mapping(CSM) problem that optimally maps cores onto an NoC architecture such that either the energy consumption or the congestion is ...
DDECS
2008
IEEE
14 years 8 days ago
2008
IEEE
Abstract—In Network-on-Chip (NoC) application design, coreto-node mapping is an important but intractable optimization problem. In the paper, we use simulated annealing to tackle...
CODES
2007
IEEE
14 years 4 days ago
2007
IEEE
System-on-Chip architectures incorporate several IP cores with well defined master and slave characteristics in terms of on-chip communication. The paper presents a parameterized ...
DATE
2003
IEEE
2003
IEEE
Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures
13 years 11 months ago
In this paper, we present an algorithm which automatically maps the IPs onto a generic regular Network on Chip (NoC) architecture and constructs a deadlock-free deterministic rout...