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JSA
2008
91views more  JSA 2008»
13 years 5 months ago
Using supplier locality in power-aware interconnects and caches in chip multiprocessors
Conventional snoopy-based chip multiprocessors take an aggressive approach broadcasting snoop requests to all nodes. In addition each node checks all received requests. This appro...
Ehsan Atoofian, Amirali Baniasadi
JCP
2006
90views more  JCP 2006»
13 years 5 months ago
Using LDA Method to Provide Mobile Location Estimation Services within a Cellular Radio Network
Abstract-- Mobile location estimation is becoming an important value-added service for a mobile phone operator. It is well-known that GPS can provide an accurate location estimatio...
Junyang Zhou, Joseph Kee-Yin Ng
NPL
2006
137views more  NPL 2006»
13 years 5 months ago
Minimal Structure of Self-Organizing HCMAC Neural Network Classifier
The authors previously proposed a self-organizing Hierarchical Cerebellar Model Articulation Controller (HCMAC) neural network containing a hierarchical GCMAC neural network and a ...
Chih-Ming Chen, Yung-Feng Lu, Chin-Ming Hong
TCAD
2008
99views more  TCAD 2008»
13 years 5 months ago
MP-Trees: A Packing-Based Macro Placement Algorithm for Modern Mixed-Size Designs
In this paper, we present a new multipacking-tree (MP-tree) representation for macro placements to handle modern mixed-size designs with large macros and high chip utilization rate...
Tung-Chieh Chen, Ping-Hung Yuh, Yao-Wen Chang, Few...
ASE
2005
137views more  ASE 2005»
13 years 5 months ago
Rewriting-Based Techniques for Runtime Verification
Techniques for efficiently evaluating future time Linear Temporal Logic (abbreviated LTL) formulae on finite execution traces are presented. While the standard models of LTL are i...
Grigore Rosu, Klaus Havelund