15 search results - page 3 / 3 » Bitstream compression techniques for Virtex 4 FPGAs |
FPGA
2001
ACM
13 years 9 months ago
2001
ACM
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
FPGA
2008
ACM
13 years 6 months ago
2008
ACM
Functional full-system simulators are powerful and versatile research tools for accelerating architectural exploration and advanced software development. Their main shortcoming is...
FCCM
1998
IEEE
13 years 9 months ago
1998
IEEE
One of the major overheads in reconfigurable computing is the time it takes to reconfigure the devices in the system. This overhead limits the speedups possible in this exciting n...
CHES
2007
Springer
13 years 11 months ago
2007
Springer
This paper describes a modular exponentiation processing method and circuit architecture that can exhibit the maximum performance of FPGA resources. The modular exponentiation arch...
FPGA
2008
ACM
13 years 6 months ago
2008
ACM
Pattern-based synthesis has drawn wide interest from researchers who tried to utilize the regularity in applications for design optimizations. In this paper we present a general p...