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» Block Size Optimization in Deduplication Systems
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CIKM
2006
Springer
13 years 9 months ago
Cache-oblivious nested-loop joins
We propose to adapt the newly emerged cache-oblivious model to relational query processing. Our goal is to automatically achieve an overall performance comparable to that of fine-...
Bingsheng He, Qiong Luo
CODES
2006
IEEE
13 years 12 months ago
A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
Martijn Coenen, Srinivasan Murali, Andrei Radulesc...
ICCAD
2000
IEEE
109views Hardware» more  ICCAD 2000»
13 years 10 months ago
Latency-Guided On-Chip Bus Network Design
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
Milenko Drinic, Darko Kirovski, Seapahn Meguerdich...
LCPC
2000
Springer
13 years 9 months ago
Efficient Dynamic Local Enumeration for HPF
In translating HPF programs, a compiler has to generate local iteration and communication sets. Apart from local enumeration, local storage compression is an issue, because in HPF ...
Will Denissen, Henk J. Sips
GLOBECOM
2006
IEEE
13 years 12 months ago
Sum Rate Maximization and Transmit Power Minimization for Multi-User Orthogonal Space Division Multiplexing
—We demonstrate that receive antenna selection (RAS) provides significant increase in the achievable sum rates for multi-user MIMO wireless downlinks that employ block diagonaliz...
Boon Chin Lim, Christian Schlegel, Witold A. Krzym...