Sciweavers

11 search results - page 1 / 3
» Boolean factoring and decomposition of logic networks
Sort
View
ICCAD
2008
IEEE
153views Hardware» more  ICCAD 2008»
14 years 1 months ago
Boolean factoring and decomposition of logic networks
This paper presents new methods for restructuring logic networks based on fast Boolean techniques. The basis for these are 1) a cut based view of a logic network, 2) exploiting th...
Alan Mishchenko, Robert K. Brayton, Satrajit Chatt...
ICCAD
1999
IEEE
119views Hardware» more  ICCAD 1999»
13 years 9 months ago
Factoring logic functions using graph partitioning
Algorithmic logic synthesis is usually carried out in two stages, the independent stage where logic minimization is performed on the Boolean equations with no regard to physical p...
Martin Charles Golumbic, Aviad Mintz
CHI
2005
ACM
14 years 5 months ago
A logic block enabling logic configuration by non-experts in sensor networks
Recent years have seen the evolution of networks of tiny low power computing blocks, known as sensor networks. In one class of sensor networks, a non-expert user, who has little o...
Susan Cotterell, Frank Vahid
DATE
2009
IEEE
123views Hardware» more  DATE 2009»
13 years 11 months ago
On decomposing Boolean functions via extended cofactoring
—We investigate restructuring techniques based on decomposition/factorization, with the objective to move critical signals toward the output while minimizing area. A specific ap...
Anna Bernasconi, Valentina Ciriani, Gabriella Truc...
ICCAD
1991
IEEE
100views Hardware» more  ICCAD 1991»
13 years 8 months ago
Layout Driven Logic Restructuring/Decomposition
As feature sizes decrease and chip sizes increase, the area and performance of chips become dominated by the interconnect. In spite of this trend, most existing synthesis systems ...
Massoud Pedram, Narasimha B. Bhat