9 search results - page 2 / 2 » Built-in self-test of FPGA interconnect |
FPL
2004
Springer
13 years 11 months ago
2004
Springer
This paper presents a novel approach to interconnect fault location for FPGAs during power-on sequence. The method is based on a concept known as fault grading which utilizes defec...
DATE
2008
IEEE
14 years 12 days ago
2008
IEEE
This paper presents a new application field for the Goertzel algorithm. The test of mixed-signal circuits involves the generation and analysis of signals. A standard method for th...
ITC
1997
IEEE
13 years 10 months ago
1997
IEEE
: Accurate diagnosis is an essential requirement in many testing environments, since it is the basis for any repair or replacement strategy used for chip or system fault-tolerance....
CSREAESA
2010
13 years 4 months ago
2010
The primary goal of Built-In Self-Test (BIST) for Field Programmable Gate Arrays (FPGAs) is to completely test all programmable logic and routing resources in the device such that ...