74 search results - page 14 / 15 » Built-in test generation for synchronous sequential circuits |
FPL
2004
Springer
13 years 11 months ago
2004
Springer
Abstract. We present an evaluation of accelerating fault simulation by hardware emulation on FPGA. Fault simulation is an important subtask in test pattern generation and it is fre...
ICCD
2005
IEEE
14 years 2 months ago
2005
IEEE
In this paper, we propose a diagnostic test generation method in conjunction with an efficient sequential SAT-based diagnosis procedure to precisely identify multiple defective si...
ICCAD
1995
IEEE
13 years 9 months ago
1995
IEEE
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
DAC
1990
ACM
13 years 10 months ago
1990
ACM
Symbolic simulation involves evaluating circuit behavior using special symbolic values to encode a range of circuit operating conditions. In one simulation run, a symbolic simulat...
MSE
2003
IEEE
13 years 11 months ago
2003
IEEE
A tool has been developed to automate the testing and grading of design projects implemented in reprogrammable hardware. The server allows multiple students to test circuits in FP...