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» CAD Directions for High Performance Asynchronous Circuits
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SAC
2009
ACM
13 years 12 months ago
Attention driven visual processing for an interactive dialog robot
In this paper we propose an attention-based vision system for the JAST interactive dialog robot. The robotic vision system incorporates three submodules: object recognition, gestu...
Thomas Müller, Alois Knoll
CCGRID
2010
IEEE
13 years 5 months ago
FaReS: Fair Resource Scheduling for VMM-Bypass InfiniBand Devices
In order to address the high performance I/O needs of HPC and enterprise applications, modern interconnection fabrics, such as InfiniBand and more recently, 10GigE, rely on network...
Adit Ranadive, Ada Gavrilovska, Karsten Schwan
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
13 years 10 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
ICDE
2010
IEEE
248views Database» more  ICDE 2010»
14 years 4 months ago
FPGA Acceleration for the Frequent Item Problem
Abstract-- Field-programmable gate arrays (FPGAs) can provide performance advantages with a lower resource consumption (e.g., energy) than conventional CPUs. In this paper, we show...
Gustavo Alonso, Jens Teubner, René Mül...
DSD
2007
IEEE
160views Hardware» more  DSD 2007»
13 years 11 months ago
Alternatives in Designing Level-Restoring Buffers for Interconnection Networks in Field-Programmable Gate Arrays
Programmable routing and logic in field-programmable gate arrays are implemented using nMOS pass transistors. Since the threshold voltage drop across an nMOS device degrades the ...
Scott Miller, Mihai Sima, Michael McGuire