99 search results - page 5 / 20 » CAD Directions for High Performance Asynchronous Circuits |
HICSS
1997
IEEE
13 years 10 months ago
1997
IEEE
One model of multithreading gaining popularity on multiprocessor systems is the message-driven model of computation. The message-driven model is a reactive model in which an arriv...
ANNS
2007
13 years 7 months ago
2007
The task of determining low noise amplifier (LNA) high-frequency performance in functional testing is as challenging as designing the circuit itself due to the difficulties associa...
VLSID
2009
IEEE
14 years 6 months ago
2009
IEEE
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
GLVLSI
2010
IEEE
13 years 11 months ago
2010
IEEE
Graphene nanoribbon tunneling FETs (GNR TFETs) are promising devices for post-CMOS low-power applications because of the low subthreshold swing, high Ion/Ioff, and potential for l...
DDECS
2009
IEEE
14 years 27 days ago
2009
IEEE
—Quasi Delay Insensitive asynchronous logic is a very robust system allowing safe implementations while requiring minimal timing assumptions. Unfortunately the design methodologi...