5 search results - page 1 / 1 » CGTA: current gain-based timing analysis for logic cells |
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
This paper introduces a new current-based cell timing analyzer, called CGTA, which has a higher performance than existing logic cell timing analysis tools. CGTA relies on a compac...
ISQED
2009
IEEE
13 years 11 months ago
2009
IEEE
Electrical Modeling for High Bandwidth IO Link Chirayu Amin, Chandramouli Kashyap ¬ Intel Corp., Hillsboro, OR Prateek Bhansali ¬ Univ. of Minnesota, Mi...
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
ISQED
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper presents a methodology for accurate propagation of delay information through a gate for the purpose of static timing analysis (STA) in the presence of noise. Convention...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
— In this paper, we present an analysis methodology to compute circuit node sensitivity due to charged particle induced delay (timing) errors, Soft Delay Errors (SDE). We define...