22 search results - page 2 / 5 » CMOS Comparators for High-Speed and Low-Power Applications |
ISLPED
1997
ACM
13 years 8 months ago
1997
ACM
In this paper we report the fully depleted CMOS/SOI device design guidelines for low power applications. Optimal technology, device and circuit parameters are discussed and compar...
DAC
1999
ACM
13 years 9 months ago
1999
ACM
Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...
ITC
1998
IEEE
13 years 9 months ago
1998
IEEE
ABSTRACT - A multiple pass A/D conversion technique is proposed for mixed-signal test applications. Only a single on-chip comparator and sample-and-hold circuit is required to digi...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper reports a high speed and low power consumption direct–indirect bootstrapped full–swing CMOS inverter driver circuit (bfi–driver). The simulation results, based o...
ICCD
2000
IEEE
13 years 9 months ago
2000
IEEE
In this paper; we present a noise-immune highperformance static circuit family suitable for low-voltage operation called skewed logic. Skewed logic circuits, in comparison with Do...