107 search results - page 3 / 22 » Cache Sharing Management for Performance Fairness in Chip Mu... |
SC
2009
ACM
14 years 1 days ago
2009
ACM
Existing cache partitioning schemes are designed in a manner oblivious to the implicit processor partitioning enforced by the operating system. This paper examines an operating sy...
ISCA
2010
IEEE
13 years 10 months ago
2010
IEEE
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
Virtual Private Machines (VPM) provide a framework for Quality of Service (QoS) in CMP-based computer systems. VPMs incorporate microarchitecture mechanisms that allow shares of h...
ISCA
2011
IEEE
12 years 9 months ago
2011
IEEE
Chip multiprocessors (CMPs) share a large portion of the memory subsystem among multiple cores. Recent proposals have addressed high-performance and fair management of these share...
ISCA
2005
IEEE
13 years 10 months ago
2005
IEEE
With the ability to place large numbers of transistors on a single silicon chip, manufacturers have begun developing chip multiprocessors (CMPs) containing multiple processor core...