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» Caches and Hash Trees for Efficient Memory Integrity
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ISCA
1999
IEEE
187views Hardware» more  ISCA 1999»
13 years 9 months ago
Area Efficient Architectures for Information Integrity in Cache Memories
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
Seongwoo Kim, Arun K. Somani
10
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GLOBECOM
2007
IEEE
13 years 11 months ago
Power Efficient IP Lookup with Supernode Caching
— In this paper, we propose a novel supernode caching scheme to reduce IP lookup latencies and energy consumption in network processors. In stead of using an expensive TCAM based...
Lu Peng, Wencheng Lu, Lide Duan
CCS
2008
ACM
13 years 6 months ago
A fast real-time memory authentication protocol
We propose a new real-time authentication scheme for memory. As in previous proposals the scheme uses a Merkle tree to guarantee dynamic protection of memory. We use the universal...
Yin Hu, Ghaith Hammouri, Berk Sunar
VLDB
1999
ACM
151views Database» more  VLDB 1999»
13 years 9 months ago
Cache Conscious Indexing for Decision-Support in Main Memory
As random access memory gets cheaper, it becomes increasingly affordable to build computers with large main memories. We consider decision support workloads within the context of...
Jun Rao, Kenneth A. Ross
IPPS
2010
IEEE
13 years 2 months ago
A PRAM-NUMA model of computation for addressing low-TLP workloads
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...
Martti Forsell