20 search results - page 1 / 4 » Cascade Scheme for Concurrent Errors Detection |
DSD
2006
IEEE
13 years 6 months ago
2006
IEEE
The paper deals with synthesis technique for designing circuits with cascade errors detection. The proposed technique is based on partitioning a scheme into a number of cascades f...
ICCV
2003
IEEE
14 years 6 months ago
2003
IEEE
A general classification framework, called boosting chain, is proposed for learning boosting cascade. In this framework, a "chain" structure is introduced to integrate h...
CHES
2004
Springer
13 years 10 months ago
2004
Springer
Because of the rapidly shrinking dimensions in VLSI, transient and permanent faults arise and will continue to occur in the near future in increasing numbers. Since cryptographic c...
ITC
2000
IEEE
13 years 9 months ago
2000
IEEE
Concurrent error detection (CED) techniques (based on hardware duplication, parity codes, etc.) are widely used to enhance system dependability. All CED techniques introduce some ...
IJCSA
2007
13 years 4 months ago
2007
In this paper we present low -cost, concurrent checking methods for multiple error detection in S-boxes of symmetric block ciphers. These are redundancy-based fault detection sche...