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» Challenges in Physical Chip Design
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ICCAD
2000
IEEE
68views Hardware» more  ICCAD 2000»
13 years 9 months ago
Challenges in Physical Chip Design
Ralph H. J. M. Otten, Paul Stravers
DAC
2007
ACM
14 years 5 months ago
Multi-Core Design Automation Challenges
The trend to multi-core chip designs presents new challenges for design automation, while the increased reuse of components may offer solutions. This paper describes some of the k...
John A. Darringer
VLSID
2002
IEEE
159views VLSI» more  VLSID 2002»
14 years 5 months ago
Challenges in the Design of a Scalable Data-Acquisition and Processing System-on-Silicon
Increasing complexity of the functionalities and the resultant growth in number of gates integrated in a chip coupled with shrinking geometries and short cycle time requirements br...
Karanth Shankaranarayana, Soujanna Sarkar, R. Venk...
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
14 years 1 months ago
Reliability Support for On-Chip Memories Using Networks-on-Chip
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
Federico Angiolini, David Atienza, Srinivasan Mura...
HPCA
2006
IEEE
14 years 5 months ago
CMP design space exploration subject to physical constraints
This paper explores the multi-dimensional design space for chip multiprocessors, exploring the inter-related variables of core count, pipeline depth, superscalar width, L2 cache s...
Yingmin Li, Benjamin C. Lee, David Brooks, Zhigang...